1. Field of the Invention
The present invention relates to semiconductor fabrication methods and devices. More specifically, the present invention relates to a method and apparatus for simultaneously annealing a substrate during ion implantation in situ.
2. Description of the Related Art
Doping is the process of introducing an impurity, called a dopant, into the crystal lattice of a semiconductor to modify the electrical properties, in particular the conductivity, of the semiconductor. Typically, doping is achieved either by diffusion or implanting ions into the semiconductor.
Diffusion is the process of introducing selected impurity atoms into predetermined areas of a semiconductor substrate to modify the electrical properties of the substrate. In a diffusion process, the semiconductor is heated to a predetermined temperature in a gaseous atmosphere containing a predetermined concentration of the impurity. Impurity atoms condense on the surface of the substrate and diffuse into the substrate in both the vertical and horizontal directions. A disadvantage of the diffusion process is that the location and concentration of impurities is difficult to control.
In the process of ion implantation, energetic, charged atoms or molecules are directly introduced into a substrate at acceleration energies generally ranging from 2 keV to 20.0 MeV.
Ion implantation is highly advantageous in comparison to diffusion for allowing precise control of the concentration of ions implanted into a substrate and for producing a much smaller lateral distribution of ions. A small lateral distribution of ions is useful for production of compact circuits and systems.
Unfortunately, ion implantation does have some disadvantages. Ion implantation cannot be achieved without causing damage (displaced atoms) to the material structure of the substrate. Damage includes crystal defects and formation of amorphous layers in crystalline targets. Furthermore, the impurities that are injected into the substrate are generally not positioned in substitutional sites that are suitable for electrical activation of the semiconductor.
Thermal processing after implantation is generally necessary to restore the substrate to a preimplantation condition. In some cases, significant damage resulting from ion implantation cannot be repaired. Thermal annealing is performed to repair isolated point defects and point defect clusters, and to transform locally amorphous regions of the substrate to a crystalline structure. Thermal processing is used not only to repair damage to the silicon substrate but also so move impurities to substitutional sites, thereby electrically activating the dopant.
In conventional semiconductor processing, semiconductor wafers are removed from an ion implant device and moved to a thermal processing chamber. Thermal energy is applied to the semiconductor wafers at a controlled temperature in the thermal processing chamber. At low temperatures of up to about 500.degree. C. vacancies and self-interstitials in close proximity are recombined, curing trapping defects that otherwise capture free charge carriers and inhibit current flow in crystalline portions of the substrate. At medium annealing temperatures in the range from 500.degree. C. to 600.degree. C., dislocations form that capture impurity atoms. Higher annealing temperatures from 900.degree. C. to 1000.degree. C. dissolve the dislocations. The activation energy of impurity diffusion in silicon is smaller than the activation energy of self-diffusion so the ratio of defect annihilation to the rate of impurity diffusion is increased with temperature. Accordingly, higher annealing temperatures are preferable with an upper annealing temperature limited to a suitable temperature for attaining a maximum allowable junction depth.
Amorphous layers are annealed at temperatures from 500.degree. C. to 600.degree. C., recrystallizing the underlying crystalline substrate with impurity atoms moving into substitutional lattice sites during regrowth so that full electrical activation is achieved within the amorphous layer at relatively low temperatures. The impurities that are implanted into the region beyond the amorphous layer are only electrically activated by the higher temperatures for activating impurities in regions of crystalline damage, normally temperatures of 800.degree. C. to 1000.degree. C.
In conventional semiconductor processing, ion implant operations and thermal processing operations are performed in separate processing chambers and at separate times. In typical ion implant processing, no thermal energy is added to the ion implant chamber during ion implantation. Conventional ion implant devices typically use some form of cooling apparatus to prevent heating during implantation and to reduce the temperature of a wafer during implantation since the temperature rises to what are considered high levels when radiant heat loss is the only form of heat dissipation. Recognized problems associated with excessive heating include undesirable partial annealing effects of damage during implantation, and degradation of a photoresist masking layer. Accordingly, some conventional ion implant devices include a cooled wafer holder or platen. In one example, a platen is clamped against a inert gas or Freon-cooled heat sink. Another embodiment uses water-cooled heat sinking.
Attempts to heat a substrate wafer during ion implantation have resulted in a phenomenon called "dynamic annealing", which impacts both implantation damage and the effects of subsequent annealing. (Wolf S. and Tauber R. N., "SILICON PROCESSING FOR THE VLSI ERA, VOLUME 1, PROCESS TECHNOLOGY", 1986, p. 306-307). A rise in temperature increases the mobility of point defects caused by the damage and begins repair of the damage even as the implant is taking place. For the implantation of light ions, heating during implantation may sufficiently repair damage that formation of amorphous layers is prevented, even at high implantation doses. For the implantation of heavy ions, dynamic annealing during implantation can cause amorphous layer growth during implantation. A wafer which is cooled using a cooling device in an ion implanter impacts the structure of damage following implantation as a result of dynamic annealing effects. Specifically, if a substrate wafer is prevented from being significantly heated above room temperature by application of heat sinking during implantation, dynamic annealing is minimized. However, if no heat sinking is applied and substrate wafers are allowed to rise in temperature to a range of approximately 150.degree. C. to 300.degree. C., dynamic annealing effects have been shown to produce unpredictable and undesirable changes in implantation damage structures. The undesirable changes in implantation damage structures include formation of buried amorphous layers or formation of crystalline layers containing high densities of dislocation loops.
What is needed is a technique for implanting ions in a semiconductor substrate, repairing damage caused by the ion implant operation, and activating the implanted ions to form an improved doped substrate for improved device performance.